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Minisymposium Presentation
Benchmarking and Co-Design at System and Processor Level
Presenter
Dr. Estela Suarez is senior scientist and deputy-lead of the Technology Department at the Jülich Supercomputing Centre, which she joined in 2010. Her research focuses on HPC system architectures and codesign. As leader of the DEEP series of EU-funded projects she has driven the development of the Cluster-Booster and the Modular Supercomputing Architectures, including HW, SW and application implementation and validation. Additionally, since 2018 she leads the codesign efforts within the European Processor Initiative. Since 2018 she gives lectures on HPC architectures at the University of Bonn. She holds a PhD in Physics from the University of Geneva and a Master degree in Astrophysics from the University Complutense of Madrid.
Description
Benchmarking provides insight into the behaviour of application codes and their kernels on HPC systems. This is useful for identifying bottlenecks and performance tuning on the application side, as well as for understanding how specific hardware features can impact (positively or negatively) the performance of those applications. It is therefore natural to use benchmarking as a vehicle for "co-design". Since this is also a term that finds different definitions, we would like to specify here that we refer to co-design in the sense of studying the interaction between application code, system software, and hardware components in search of the modifications at each of these three levels that would bring the best overall performance and energy efficiency. In this talk, we will present experiences on the use of benchmarking for co-design purposes gathered in the EU-funded DEEP and EPI projects. While in the former we looked at the system level, in the latter the focus is on the processor and even core level. We will describe the differences between the two and the challenges that we found.